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Chapter 2 Hardware Overview of the NI 781xR
NI 781xR User Manual 2-4 ni.com
Figure 2-2 shows DIO<0..3> configured for digital input and DIO<4..7>
configured for digital output. Digital input applications include receiving
TTL, LVTTL, CMOS, or LVCMOS signals and sensing external device
states, such as the state of the switch shown in Figure 2-2. Digital output
applications include sending TTL or LVCMOS signals and driving external
devices, such as the LED shown in Figure 2-2.
The NI 781xR SH68-C68-S shielded cable contains 34 twisted pairs of
conductors. To maximize the digital I/O available on the NI 781xR, some
of the DIO lines are twisted with power or ground, and some DIO lines are
twisted with other DIO lines. To obtain maximum signal integrity, place
edge-sensitive or high-frequency digital signals on the DIO lines that are
paired with power or ground. Because the DIO lines that are twisted with
other DIO lines can couple noise onto each other, use these lines for static
signals or for non-edge-sensitive, low-frequency digital signals. Examples
of high-frequency or edge-sensitive signals include clock, trigger,
pulse-width modulation (PWM), encoder, and counter signals. Examples of
static signals or non-edge-sensitive, low-frequency signals include LEDs,
switches, and relays. Table 2-1 summarizes these guidelines.
RTSI Trigger Bus
The NI 781xR can send and receive triggers through the RTSI trigger bus.
The RTSI bus provides eight shared trigger lines that connect to all the
devices on the bus. In PXI, the trigger lines are shared between all the PXI
slots in a bus segment. In PCI, the RTSI bus is implemented through a
ribbon cable connected to the RTSI connector on each device that needs to
access the RTSI bus.
You can use the RTSI trigger lines to synchronize the NI 781xR to any other
device that supports RTSI triggers. On the NI PCI-781xR, the RTSI trigger
Table 2-1. DIO Signal Guidelines for the NI PXI-781xR
Digital Lines
SH68-C68-S Shielded
Cable Signal Pairing
Recommended Types
of Digital Signals
DIO<0..27> DIO line paired with power
or ground
All types—high-frequency or
low-frequency signals,
edge-sensitive or
non-edge-sensitive signals
DIO<28..39> DIO line paired with another
DIO line
Static signals or
non-edge-sensitive,
low-frequency signals
- Reconfigurable I/O 1
- Important Information 3
- Compliance 4
- Contents 5
- About This Manual 7
- Related Documentation 9
- Introduction 10
- Using PXI with CompactPCI 11
- Reconfigurable I/O Concept 12
- Flexible Functionality 12
- User-Defined I/O Resources 13
- Software Development 14
- LabVIEW Real-Time Module 15
- Custom Cabling 16
- Cables and Optional Equipment 16
- Safety Information 17
- Hardware Overview 19
- NI 7811R Overview 20
- NI 7813R Overview 20
- Digital I/O 20
- RTSI Trigger Bus 22
- PXI Local Bus 23
- Switch Settings 24
- SW1, SW2, SW3 25
- Figure 2-5. Switch Settings 26
- Power Connections 27
- Specifications 28
- Reconfigurable FPGA 29
- Bus Interface 29
- Power Requirement 30
- Physical 30
- Environmental 31
- Operating Environment 31
- Storage Environment 31
- Electromagnetic Compatibility 32
- CE Compliance 32
- Connecting I/O Signals 33
- PCI-781xR 34
- DIO 0–23 Connector 38
- Pin Assignment 38
- DIO 24–39 Connector 38
- Using the SCB-68 39
- Shielded Connector Block 39
- Technical Support and 40
- Professional Services 40
- Glossary 42
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