National-instruments Data Acquisition Device NI USB-621x Manual de usuario Pagina 126
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Chapter 8 Counters
© National Instruments Corporation 8-33 NI USB-621x User Manual
Cascading Counters
You can internally route the Counter n Internal Output and Counter n TC
signals of each counter to Gate inputs of the other counter. By cascading
two counters together, you can effectively create a 64-bit counter. By
cascading counters, you also can enable other applications. For example,
to improve the accuracy of frequency measurements, use reciprocal
frequency measurement, as described in the Method 3 bullet of the
Frequency Measurement section.
Counter Filters
You can enable a programmable debouncing filter on each PFI signal.
When the filters are enabled, your device samples the input on each rising
edge of a filter clock. USB-621x devices use an onboard oscillator to
generate the filter clock with a 40 MHz frequency.
Note NI-DAQmx only supports filters on counter inpu ts.
The following is an example of low to high transitions of the input signal.
High to low transitions work similarly.
Assume that an input terminal has been low for a long time. The input
terminal then changes from low to high, but glitches several times. When
the filter clock has sampled the signal high on N consecutive edges, the low
to high transition is propagated to the rest of the circuit. The value of N
depends on the filter setting; refer to Table 8-5.
The filter setting for each input can be configured independently. On power
up, the filters are disabled. Figure 8-29 shows an example of a low to high
transition on an input that has its filter set to 125 ns (N = 5).
Table 8-5. Filters
Filter Setting
N (Filter Clocks
Needed to
Pass Signal)
Pulse Width
Guaranteed to
Pass Filter
Pulse Width
Guaranteed to
Not Pass Filter
125 ns 5 125 ns 100 ns
6.425 μs 257 6.425 μs 6.400 μs
2.56 ms ~101,800 2.56 ms 2.54 ms
Disabled — — —
- DAQ M Series 1
- Important Information 3
- Compliance 4
- Chapter 4 6
- Chapter 5 7
- Contents 10
- About This Manual 12
- Related Documentation 13
- LabWindows/CVI 15
- Measurement Studio 15
- Training Courses 17
- Technical Support on the Web 17
- Getting Started 18
- Device Specifications 19
- USB Cable Strain Relief 20
- Mounting the USB-621x 21
- Panel Mounting 22
- Chapter 1 Getting Started 23
- DAQ System Overview 24
- DAQ-STC2 25
- Calibration Circuitry 25
- Signal Conditioning 26
- Cables and Accessories 27
- Chapter 2 DAQ System Overview 28
- Connector and LED Information 29
- +5 V Power 31
- USB Device Fuse Replacement 31
- 0.75A,125V Fuse, Socketed 32
- PWR/ACT LED Indicator 33
- Analog Input 34
- Analog Input Range 35
- Chapter 4 Analog Input 36
- Figure 4-2. NI-PGIA 37
- NI-DAQmx Create 38
- Virtual Channel.vi 38
- Field Wiring Considerations 43
- Analog Input Timing Signals 44
- AI Sample Clock Signal 47
- Using an Internal Source 47
- Using an External Source 47
- Other Timing Requirements 47
- AI Convert Clock Signal 49
- AI Hold Complete Event Signal 52
- AI Start Trigger Signal 53
- Using a Digital Source 53
- Reference Trigger 54
- Pretrigger Samples 54
- Complete Buffer 54
- Posttrigger Samples 54
- AI Pause Trigger Signal 55
- USB-6210/6211/6212 Devices 56
- (NRSE Configuration) 68
- AO Range 73
- Chapter 5 Analog Output 74
- Analog Output Timing Signals 75
- AO Start Trigger Signal 76
- AO Pause Trigger Signal 77
- Pause Trigger 78
- Sample Clock 78
- Digital I/O 81
- Chapter 6 Digital I/O 82
- Chapter 7 PFI 89
- Connecting PFI Input Signals 91
- PFI Filters 91
- Figure 7-4. Filter Example 92
- Table 7-1. Filters 92
- I/O Protection 93
- Programmable Power-Up States 93
- Counters 94
- Counter Input Applications 95
- Pulse-Width Measurement 97
- Period Measurement 99
- Single Period Measurement 99
- Buffered Period Measurement 100
- Semi-Period Measurement 101
- Frequency Measurement 102
- Figure 8-10. Method 1 103
- Figure 8-11. Method 1b 104
- Figure 8-12. Method 2 105
- Figure 8-13. Method 3 106
- Chapter 8 Counters 107
- Position Measurement 108
- Channel Z Behavior 109
- Counter Output Applications 113
- Pulse Train Generation 115
- Frequency Generation 116
- Using the Frequency Generator 116
- Frequency Division 117
- Pulse Generation for ETS 117
- Counter Timing Signals 118
- Counter n Source Signal 119
- Counter n Gate Signal 120
- Counter n Aux Signal 120
- Counter n Up_Down Signal 121
- Counter n HW Arm Signal 121
- Default Counter/Timer Pinouts 123
- Counter Triggering 124
- Other Counter Features 125
- Cascading Counters 126
- Counter Filters 126
- Prescaling 127
- Duplicate Count Prevention 128
- Duplicate Counting) 128
- (Duplicate Counting) 129
- USB-6215/6216/6218 Devices 131
- Digital Isolation 132
- Reducing Common-Mode Noise 133
- Isolated Systems 134
- Non-Isolated Systems 134
- 80 MHz Timebase 135
- 20 MHz Timebase 135
- 100 kHz Timebase 135
- Bus Interface 136
- Chapter 11 Bus Interface 137
- Triggering 138
- Chapter 12 Triggering 139
- Device-Specific Information 140
- USB-6210 141
- USB-6211/6215 143
- USB-6212/6216 Screw Terminal 145
- USB-6216 Mass Termination 147
- TERMINAL 1 148
- TERMINAL 34 148
- TERMINAL 35 148
- TERMINAL 68 148
- NC = No Connect 148
- SCC Accessories 149
- BNC Accessories 150
- Screw Terminal Accessories 150
- USB-6218 152
- Troubleshooting 154
- Channel 0 155
- Channel 1 155
- Convert Period 155
- Sample Period 155
- Analog Output 156
- Technical Support and 157
- Professional Services 157
- Glossary 159
- Numerics 175
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